Understanding High-Performance Inter-Core Communication - Part 1

Modern multi-core systems run into a familiar challenge: how do you efficiently pass messages between processes running on different CPU cores? While shared memory seems like an obvious solution, naive implementations can suffer significant performance penalties due to cache coherency overhead. This post explores two contrasting designs—a traditional counter-based queue and Barrelfish OS’s UMP (User-level Message Passing)¹—to understand how architectural awareness leads to performance improvements.

1. Baumann, Andrew, et al. The Multikernel: A new OS architecture for scalable multicore systems. SOSP 2009. https://barrelfish.org/documentation.html ↩︎